Versatile Link PLUS transceiver development
نویسندگان
چکیده
منابع مشابه
A High-Speed Clockless Serial Link Transceiver
We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high offchip data rates by using multiplexing transmitters and demultiplexing receivers that interface parallel on-chip data paths with high-speed, serial off-chip buses. While synchronous transceivers commonly use multi-phase clocks to control ...
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A 4-Gbit/s serial link transceiver is fabricated in a MOSIS 0.5m HPCMOS process. To achieve the high data rate without speed critical logic on chip, the data are multiplexed when transmitted and immediately demultiplexed when received. This parallelism is achieved by using multiple phases tapped from a PLL using the phase spacing to determine the bit time. Using an 8 : 1 multiplexer yields 4 Gb...
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www.xilinx.com 1 © 2008 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. Summary Serial ATA (SATA) is a high-speed serial link replacement for the parallel ATA (PATA) physical storage interface. The serial link employs a high-speed differential l...
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ژورنال
عنوان ژورنال: Journal of Instrumentation
سال: 2017
ISSN: 1748-0221
DOI: 10.1088/1748-0221/12/03/c03068